/*
 * Copyright (c) 2015 iComm-semi Ltd.
 *
 * This program is free software: you can redistribute it and/or modify 
 * it under the terms of the GNU General Public License as published by 
 * the Free Software Foundation, either version 3 of the License, or 
 * (at your option) any later version.
 * This program is distributed in the hope that it will be useful, but 
 * WITHOUT ANY WARRANTY; without even the implied warranty of 
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
 * See the GNU General Public License for more details.
 * You should have received a copy of the GNU General Public License 
 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 */

#ifdef COMMON_FOR_REDBULL
#include <stdio.h>
#include <string.h>
#include <ssv_regs.h>
#include "turismo_common.h"
#endif
const int cal_ch_5g[4] = { 36, 40, 100, 140};
const u32 am_mask[2] = {0xfffffc00,0xfc00ffff};
const u32 padpd_am_addr_table[5][13]=
                   {{ADR_WIFI_PADPD_2G_GAIN_REG0,
                     ADR_WIFI_PADPD_2G_GAIN_REG1,
                     ADR_WIFI_PADPD_2G_GAIN_REG2,
                     ADR_WIFI_PADPD_2G_GAIN_REG3,
                     ADR_WIFI_PADPD_2G_GAIN_REG4,
                     ADR_WIFI_PADPD_2G_GAIN_REG5,
                     ADR_WIFI_PADPD_2G_GAIN_REG6,
                     ADR_WIFI_PADPD_2G_GAIN_REG7,
                     ADR_WIFI_PADPD_2G_GAIN_REG8,
                     ADR_WIFI_PADPD_2G_GAIN_REG9,
                     ADR_WIFI_PADPD_2G_GAIN_REGA,
                     ADR_WIFI_PADPD_2G_GAIN_REGB,
                     ADR_WIFI_PADPD_2G_GAIN_REGC},
                    {ADR_WIFI_PADPD_5100_GAIN_REG0,
                     ADR_WIFI_PADPD_5100_GAIN_REG1,
                     ADR_WIFI_PADPD_5100_GAIN_REG2,
                     ADR_WIFI_PADPD_5100_GAIN_REG3,
                     ADR_WIFI_PADPD_5100_GAIN_REG4,
                     ADR_WIFI_PADPD_5100_GAIN_REG5,
                     ADR_WIFI_PADPD_5100_GAIN_REG6,
                     ADR_WIFI_PADPD_5100_GAIN_REG7,
                     ADR_WIFI_PADPD_5100_GAIN_REG8,
                     ADR_WIFI_PADPD_5100_GAIN_REG9,
                     ADR_WIFI_PADPD_5100_GAIN_REGA,
                     ADR_WIFI_PADPD_5100_GAIN_REGB,
                     ADR_WIFI_PADPD_5100_GAIN_REGC},
                   { ADR_WIFI_PADPD_5500_GAIN_REG0,
                     ADR_WIFI_PADPD_5500_GAIN_REG1,
                     ADR_WIFI_PADPD_5500_GAIN_REG2,
                     ADR_WIFI_PADPD_5500_GAIN_REG3,
                     ADR_WIFI_PADPD_5500_GAIN_REG4,
                     ADR_WIFI_PADPD_5500_GAIN_REG5,
                     ADR_WIFI_PADPD_5500_GAIN_REG6,
                     ADR_WIFI_PADPD_5500_GAIN_REG7,
                     ADR_WIFI_PADPD_5500_GAIN_REG8,
                     ADR_WIFI_PADPD_5500_GAIN_REG9,
                     ADR_WIFI_PADPD_5500_GAIN_REGA,
                     ADR_WIFI_PADPD_5500_GAIN_REGB,
                     ADR_WIFI_PADPD_5500_GAIN_REGC},
                   { ADR_WIFI_PADPD_5700_GAIN_REG0,
                     ADR_WIFI_PADPD_5700_GAIN_REG1,
                     ADR_WIFI_PADPD_5700_GAIN_REG2,
                     ADR_WIFI_PADPD_5700_GAIN_REG3,
                     ADR_WIFI_PADPD_5700_GAIN_REG4,
                     ADR_WIFI_PADPD_5700_GAIN_REG5,
                     ADR_WIFI_PADPD_5700_GAIN_REG6,
                     ADR_WIFI_PADPD_5700_GAIN_REG7,
                     ADR_WIFI_PADPD_5700_GAIN_REG8,
                     ADR_WIFI_PADPD_5700_GAIN_REG9,
                     ADR_WIFI_PADPD_5700_GAIN_REGA,
                     ADR_WIFI_PADPD_5700_GAIN_REGB,
                     ADR_WIFI_PADPD_5700_GAIN_REGC},
                   { ADR_WIFI_PADPD_5900_GAIN_REG0,
                     ADR_WIFI_PADPD_5900_GAIN_REG1,
                     ADR_WIFI_PADPD_5900_GAIN_REG2,
                     ADR_WIFI_PADPD_5900_GAIN_REG3,
                     ADR_WIFI_PADPD_5900_GAIN_REG4,
                     ADR_WIFI_PADPD_5900_GAIN_REG5,
                     ADR_WIFI_PADPD_5900_GAIN_REG6,
                     ADR_WIFI_PADPD_5900_GAIN_REG7,
                     ADR_WIFI_PADPD_5900_GAIN_REG8,
                     ADR_WIFI_PADPD_5900_GAIN_REG9,
                     ADR_WIFI_PADPD_5900_GAIN_REGA,
                     ADR_WIFI_PADPD_5900_GAIN_REGB,
                     ADR_WIFI_PADPD_5900_GAIN_REGC}};
const u32 pm_mask[2] = {0xffffe000,0xe000ffff};
const u32 padpd_pm_addr_table[5][13]=
                   {{ADR_WIFI_PADPD_2G_PHASE_REG0 ,
                     ADR_WIFI_PADPD_2G_PHASE_REG1 ,
                     ADR_WIFI_PADPD_2G_PHASE_REG2 ,
                     ADR_WIFI_PADPD_2G_PHASE_REG3 ,
                     ADR_WIFI_PADPD_2G_PHASE_REG4 ,
                     ADR_WIFI_PADPD_2G_PHASE_REG5 ,
                     ADR_WIFI_PADPD_2G_PHASE_REG6 ,
                     ADR_WIFI_PADPD_2G_PHASE_REG7 ,
                     ADR_WIFI_PADPD_2G_PHASE_REG8 ,
                     ADR_WIFI_PADPD_2G_PHASE_REG9 ,
                     ADR_WIFI_PADPD_2G_PHASE_REGA ,
                     ADR_WIFI_PADPD_2G_PHASE_REGB ,
                     ADR_WIFI_PADPD_2G_PHASE_REGC },
                   {ADR_WIFI_PADPD_5100_PHASE_REG0,
                    ADR_WIFI_PADPD_5100_PHASE_REG1,
                    ADR_WIFI_PADPD_5100_PHASE_REG2,
                    ADR_WIFI_PADPD_5100_PHASE_REG3,
                    ADR_WIFI_PADPD_5100_PHASE_REG4,
                    ADR_WIFI_PADPD_5100_PHASE_REG5,
                    ADR_WIFI_PADPD_5100_PHASE_REG6,
                    ADR_WIFI_PADPD_5100_PHASE_REG7,
                    ADR_WIFI_PADPD_5100_PHASE_REG8,
                    ADR_WIFI_PADPD_5100_PHASE_REG9,
                    ADR_WIFI_PADPD_5100_PHASE_REGA,
                    ADR_WIFI_PADPD_5100_PHASE_REGB,
                    ADR_WIFI_PADPD_5100_PHASE_REGC},
                   {ADR_WIFI_PADPD_5500_PHASE_REG0,
                    ADR_WIFI_PADPD_5500_PHASE_REG1,
                    ADR_WIFI_PADPD_5500_PHASE_REG2,
                    ADR_WIFI_PADPD_5500_PHASE_REG3,
                    ADR_WIFI_PADPD_5500_PHASE_REG4,
                    ADR_WIFI_PADPD_5500_PHASE_REG5,
                    ADR_WIFI_PADPD_5500_PHASE_REG6,
                    ADR_WIFI_PADPD_5500_PHASE_REG7,
                    ADR_WIFI_PADPD_5500_PHASE_REG8,
                    ADR_WIFI_PADPD_5500_PHASE_REG9,
                    ADR_WIFI_PADPD_5500_PHASE_REGA,
                    ADR_WIFI_PADPD_5500_PHASE_REGB,
                    ADR_WIFI_PADPD_5500_PHASE_REGC},
                   {ADR_WIFI_PADPD_5700_PHASE_REG0,
                    ADR_WIFI_PADPD_5700_PHASE_REG1,
                    ADR_WIFI_PADPD_5700_PHASE_REG2,
                    ADR_WIFI_PADPD_5700_PHASE_REG3,
                    ADR_WIFI_PADPD_5700_PHASE_REG4,
                    ADR_WIFI_PADPD_5700_PHASE_REG5,
                    ADR_WIFI_PADPD_5700_PHASE_REG6,
                    ADR_WIFI_PADPD_5700_PHASE_REG7,
                    ADR_WIFI_PADPD_5700_PHASE_REG8,
                    ADR_WIFI_PADPD_5700_PHASE_REG9,
                    ADR_WIFI_PADPD_5700_PHASE_REGA,
                    ADR_WIFI_PADPD_5700_PHASE_REGB,
                    ADR_WIFI_PADPD_5700_PHASE_REGC},
                   {ADR_WIFI_PADPD_5900_PHASE_REG0,
                    ADR_WIFI_PADPD_5900_PHASE_REG1,
                    ADR_WIFI_PADPD_5900_PHASE_REG2,
                    ADR_WIFI_PADPD_5900_PHASE_REG3,
                    ADR_WIFI_PADPD_5900_PHASE_REG4,
                    ADR_WIFI_PADPD_5900_PHASE_REG5,
                    ADR_WIFI_PADPD_5900_PHASE_REG6,
                    ADR_WIFI_PADPD_5900_PHASE_REG7,
                    ADR_WIFI_PADPD_5900_PHASE_REG8,
                    ADR_WIFI_PADPD_5900_PHASE_REG9,
                    ADR_WIFI_PADPD_5900_PHASE_REGA,
                    ADR_WIFI_PADPD_5900_PHASE_REGB,
                    ADR_WIFI_PADPD_5900_PHASE_REGC}};
#ifdef COMMON_FOR_SMAC
 const u8 pkt1614[] ={
         0x4e, 0x06, 0x3a, 0x00, 0x71, 0x00, 0x00, 0x00, 0x50, 0x6a, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x00,
         0x2c, 0x00, 0x2c, 0x00, 0x00, 0x00, 0x40, 0x00, 0xf7, 0x84, 0x00, 0x00, 0x4e, 0x10, 0x11, 0x00,
         0xf6, 0x84, 0x00, 0x00, 0x54, 0x20, 0x00, 0x00, 0xe5, 0x84, 0x08, 0x01, 0x66, 0x20, 0x14, 0x00,
         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
         0x88, 0x01, 0x2c, 0x00, 0xe4, 0xf4, 0xc6, 0x03, 0x5f, 0x49, 0x00, 0xaa, 0xb5, 0xc7, 0xd7, 0xf6,
         0xf0, 0xde, 0xf1, 0x75, 0x05, 0x9d, 0xc0, 0x26, 0x00, 0x00, 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00,
         0x08, 0x00, 0x45, 0x00, 0x05, 0xdc, 0x50, 0x02, 0x40, 0x00, 0x40, 0x06, 0x61, 0xa4, 0xc0, 0xa8,
         0x01, 0x21, 0xc0, 0xa8, 0x01, 0x04, 0xc3, 0xa1, 0x13, 0x89, 0x1c, 0x24, 0xdb, 0x71, 0x80, 0x8c,
         0xa5, 0x83, 0x80, 0x10, 0x00, 0xe5, 0x69, 0xdf, 0x00, 0x00, 0x01, 0x01, 0x08, 0x0a, 0x00, 0xd3,
         0x02, 0xe2, 0x22, 0xc7, 0xbf, 0x14, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33,
         0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39,
         0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35,
         0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31,
         0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
         0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33,
         0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39,
         0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35,
         0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31,
         0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
         0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33,
         0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39,
         0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35,
         0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31,
         0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
         0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33,
         0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39,
         0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35,
         0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31,
         0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
         0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33,
         0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39,
         0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35,
         0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31,
         0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
         0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33,
         0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39,
         0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35,
         0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31,
         0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
         0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33,
         0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39,
         0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35,
         0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31,
         0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
         0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33,
         0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39,
         0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35,
         0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31,
         0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
         0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33,
         0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39,
         0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35,
         0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31,
         0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
         0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33,
         0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39,
         0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35,
         0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31,
         0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
         0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33,
         0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39,
         0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35,
         0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31,
         0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
         0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33,
         0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39,
         0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35,
         0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31,
         0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
         0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33,
         0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39,
         0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35,
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#endif
const u8 xtal_sx_cp_isel_wf[11] = { 0x8, 0x5, 0x5, 0x7, 0xb, 0x7, 0x5, 0x8, 0x7, 0x7, 0x5};
const char* xtal_type[XTALMAX]= { "16", "24", "26", "40", "12", "20", "25", "32", "19.2", "38.4", "52"};
int ssv6006_get_pa_band(int ch)
{
    int pa_band = 0;
    if (ch <=14){
        pa_band =0;
    } else if (ch < 36) {
        pa_band = 1;
    } else if ((ch >= 36) && (ch < 100)){
        pa_band = 2;
    } else if ((ch >= 100) && (ch < 140)){
        pa_band = 3;
    } else if (ch >= 140){
        pa_band = 4;
    }
    return pa_band;
}
void turismo_pre_cal(SSV_HW *sh)
{
    SET_RG_MODE(MODE_STANDBY);
    SET_RG_CAL_INDEX(CAL_IDX_NONE);
    SET_RG_MODE_MANUAL(1);
    SET_RG_MODE(MODE_CALIBRATION);
}
void turismo_post_cal(SSV_HW *sh)
{
    SET_RG_MODE(MODE_STANDBY);
    SET_RG_MODE_MANUAL(0);
}
void turismo_inter_cal(SSV_HW *sh)
{
    SET_RG_MODE(MODE_STANDBY);
    UDELAY(100);
    SET_RG_MODE(MODE_CALIBRATION);
}
